1. Field of the Invention
The invention relates in general to a current-mode differential transmitter and receiver and more particularly to a current-mode differential transmitter and receiver with low noise and large data swing.
2. Description of the Related Art
FIG. 1 shows a circuit diagram of a conventional current-mode transmitter. The current-mode transmitter 100 receives an input voltage signal VI, and accordingly generates an output current signal Iout. The current-mode transmitter 100 includes two switches implemented by NMOS transistors M6 and M7, and a current mirror composed of NMOS transistors M1˜M5. The switch M6 is coupled in a current path CP11 and controlled by the input voltage signal VI. The switch M7 has one end receiving a supply voltage VDD and the other end coupled to one end of the switch M6, and controlled by the inverted signal VIB of the input voltage signal VI.
The current mirror mirrors a reference current IB to a current path CP12. The current mirror also mirrors the reference current IB to the current path CP11 when the switch M6 is turned on. The current value of the output current signal Iout is a sum of the currents on the current paths CP11 and CP12. When a voltage level of the input voltage signal VI is a low voltage level, the switch M6 is turned on. Thus, the current signal Iout has a current value of 2IB. When a voltage level of the signal VI is a high voltage level, the switch M6 is turned off. Thus, the current signal Iout has a current value of IB.
FIG. 2 shows a circuit diagram of a conventional current-mode receiver. The current-mode receiver 200 receives an input current signal Iout, and accordingly generates an output voltage signal on an output terminal OUT. The current-mode receiver 200 includes a PMOS transistor M10, a NMOS transistor M9, a current source implemented by a PMOS transistor M8, and a current mirror composed of PMOS transistors M4 and M6, and NMOS transistors M7.
The current mirror mirrors the input current signal Iout to a current path CP21, and the current source generates a reference current ICM flowing in a current path CP22. The transistor M10 has a source receiving a supply voltage VDD and a drain coupled to the output terminal OUT. The transistor M9 has a drain coupled to the output terminal OUT and a source receiving a ground voltage GND. The gate-to-source voltages of the transistors M9 and M10 are determined respectively according to currents flowing in the current paths CP21 and CP22.
The current-mode receiver 200 further includes a NMOS transistor M5, and a bias voltage generation circuit composed of PMOS transistors M1 and M2, and a NMOS transistor M3. The bias voltage generation circuit provides a bias voltage as the gate-to-source voltage of the transistor M5 such that it is turned on. If the input current signal Iout has a current value smaller than that of the reference current ICM, the voltage level on the output terminal OUT is the supply voltage VDD. If the input current signal Iout has a current value larger than that of the reference current ICM, the voltage level on the output terminal OUT is the ground voltage GND.
The above-mentioned current-mode transmitter and receiver both have a form of single-end output or input and thus are subject to noise interference.